Flat panel displays show a significant potential for reducing the weight, volume, power consumption, and cost, as well as providing enhanced reliability compared to the conventional cathode ray tube (CRT) displays. These displays are being developed as a replacement for CRT displays in several select applications such as for computer, entertainment, military and avionic displays. The display technologies, namely plasma, thin film electroluminescence (TFEL), and active matrix liquid crystal displays (AMLCD), which are being actively developed to realize this potential, share the common features of matrix addressing and the associated driver interconnect problems. Presently, the row and column drivers are fabricated using bulk single crystal silicon. The driver chips are interconnected to the display glass using either the flex cable, or chip-on-glass approach. Both approaches limit the achievable display resolution due to minimum interconnect pitch required, consume significant peripheral space, and present reliability issues due to the thousands of interconnects between the glass and driver chips.
By fabricating drivers on glass (integrated drivers), the above problems can be alleviated. Integrated drivers drastically reduce the number of interconnects from several thousand to around 10, allow higher resolution, redundancy, and greater flexibility in display system packaging, and improve display reliability. Unfortunately, the present amorphous silicon (a-Si) and polysilicon (poly-Si) thin film transistor (TFT) technologies do not allow fabrication of high resolution integrated drivers due to their low mobility. A-Si has mobility in the range of 0.1-1.0 centimeter.sup.2 /volt*second (Cm.sup.2 /V.S.), which is too low for fabricating integrated display drivers. Poly-Si has a mobility in the range of 10-50 Cm.sup.2 /V. Sec. and has been used to fabricate integrated drivers for moderate resolution displays such as 480 H.times.440 V pixels. However, for higher resolutions such as 1024 H .times.1024 V, use of poly-Si TFTs requires a complex series/parallel driver architecture, without a dramatic reductions in the number of interconnects required.
High resolution active matrix displays require drivers capable of being operated in the several megahertz frequency range. Such performance requires a semiconductor with a field effect mobility in excess of 300 centimeter.sup.2 /volt.second. Only single crystal silicon is known to satisfy this requirement. Single crystal silicon allows simpler driver architecture and dramatically reduces the number of interconnects needed. However, it has not been possible to deposit single crystal silicon films on display glass substrates. Depending on the substrate temperature, such depositing of silicon films results in films that are either amorphous or polycrystalline, and have lower mobility. Yet, single crystal silicon films can be deposited on sapphire substrates, i.e., silicon on sapphire (SOS) technology, which are transparent. Although SOS transistors have high mobility, their leakage currents are unacceptably high for active matrix display application. Other disadvantages are that large area sapphire substrates are not readily available and they are expensive.
Electrostatic bonding of a single crystal silicon wafer to a glass substrate and thinning (preferential etching) of the silicon wafer have been used by others for producing high mobility single crystal silicon films on glass substrates. Others have utilized CORNING Code 1729 glass substrates in their experiments. The 1729 substrate is a high temperature (i.e., strain point =850.degree. Celsius (C) glass. The glass has been produced by Corning Corp. in a small rod form and sliced into wafers in experimental quantities. This 1729 glass is difficult to produce with large areas for practical applications due to its high temperature. The most commonly available display glass substrates for practical applications are CORNING Code 7059, CORNING Code 1733, HOYA NA40, and ASAHI NA. The upper useable temperature limit of these display glass substrates is about 640.degree. C. The difficulty is that such temperature is not adequate for forming a high quality thermal silicon dioxide gate dielectric utilized in the conventional MOS processing for display driver circuits or chips. Transistors fabricated with deposited silicon dioxide gate dielectric at temperatures less than 700.degree. C., generally have higher threshold voltages and/or threshold voltage instabilities due to defects in such deposited dielectric. Additionally, these thin film transistors (TFT), when used as active matrix switches, require light shields at the top and bottom to maintain low leakage currents (i.e., off-currents), while operating under high ambient light conditions. However, in view of the conventional electrostatic bonding and preferential thinning approach, it is not possible to light shield the bottom side of the TFT because the back interface of the substrate is not accessible after electrostatic bonding. There is a great need for a process of fabricating high mobility TFTs and integrated drivers, which circumvents the above-mentioned problems. The present invention is a process which solves those problems.